htw saar Piktogramm QR-encoded URL
Back to Main Page Choose Module Version:
XML-Code

flag



Application-Specific Integrated Circuits

Module name (EN):
Name of module in study programme. It should be precise and clear.
Application-Specific Integrated Circuits
Degree programme:
Study Programme with validity of corresponding study regulations containing this module.
Electrical Engineering and Information Technology, Bachelor, ASPO 01.10.2018
Module code: E2611
SAP-Submodule-No.:
The exam administration creates a SAP-Submodule-No for every exam type in every module. The SAP-Submodule-No is equal for the same module in different study programs.
P211-0066
Hours per semester week / Teaching method:
The count of hours per week is a combination of lecture (V for German Vorlesung), exercise (U for Übung), practice (P) oder project (PA). For example a course of the form 2V+2U has 2 hours of lecture and 2 hours of exercise per week.
2V+1U (3 hours per week)
ECTS credits:
European Credit Transfer System. Points for successful completion of a course. Each ECTS point represents a workload of 30 hours.
3
Semester: 6
Mandatory course: yes
Language of instruction:
German
Assessment:
Oral examination

[updated 08.01.2020]
Applicability / Curricular relevance:
All study programs (with year of the version of study regulations) containing the course.

E2611 (P211-0066) Electrical Engineering and Information Technology, Bachelor, ASPO 01.10.2018 , semester 6, mandatory course, technical
Workload:
Workload of student for successfully completing the course. Each ECTS credit represents 30 working hours. These are the combined effort of face-to-face time, post-processing the subject of the lecture, exercises and preparation for the exam.

The total workload is distributed on the semester (01.04.-30.09. during the summer term, 01.10.-31.03. during the winter term).
45 class hours (= 33.75 clock hours) over a 15-week period.
The total student study time is 90 hours (equivalent to 3 ECTS credits).
There are therefore 56.25 hours available for class preparation and follow-up work and exam preparation.
Recommended prerequisites (modules):
None.
Recommended as prerequisite for:
Module coordinator:
Prof. Dr. Xiaoying Wang
Lecturer: Prof. Dr. Xiaoying Wang

[updated 10.09.2018]
Learning outcomes:
After successfully completing this module, students will be able to explain different technologies ASIC, FPGA, processors and memory elements and name their main features. They will play a key role in deciding on the use of specific technologies to solve specific development tasks. They will be familiar with the design process of integrated circuits and will be able to implement it in practical exercises. Students will be able to use the hardware description language Verilog to independently design and test FPGAs with the help of a suitable simulation tool.

[updated 05.07.2021]
Module content:
- An overview of integrated circuits
- Design process: Y-diagram, synthesis and verification, design method
- Full custom ASIC, semi-custom ASIC
- Programmable logic circuits: FPGA, PLA, PAL, CPLD
- CMOS digital technology and logic elements
- Combinational logic and sequential logic
- Processing power and timing in ICs
- Power dissipation im CMOS Technology
- Semiconductor memory: SRAM, DRAM, EEPROM, Flash
- Introduction ot the hardware description language Verilog

[updated 05.07.2021]
Teaching methods/Media:
Powerpoint, PC, Verilog simulation tools

[updated 05.07.2021]
Recommended or required reading:
- N. Weste, D.M. Harris, CMOS VLSI Design: A Circuits and Systems Perspective, Pearson, 4. Edition (1. März 2010),  ISBN: 978-0321547743
- J.M. Rabaey, A. Chandrakasan, B. Nikolic, Digital Integrated Circuits: A Design Perspective, PHI Learning, 2nd Edition (1. Januar 2002),  ISBN: 978-8120322578
- P.J. Ashenden, Digital Design: An Embedded Systems Approach Using Verilog, Morgan Kaufmann (24. Oktober 2007),  ISBN: 978-0123695277
- Harald Flügel, FPGA-Design mit Verilog, De Gruyter Oldenbourg (19.05.2010), ISBN: 978-3486592344
- D.E. Thomas, P.R. Moorby, The Verilog Hardware Description Language, Springer, 1995, ISBN: 978-1475723656

[updated 05.07.2021]
[Wed Dec  4 16:51:24 CET 2024, CKEY=e3E2611, BKEY=ei, CID=E2611, LANGUAGE=en, DATE=04.12.2024]