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Computer Architecture

Module name (EN): Computer Architecture
Degree programme: Computer Science and Communication Systems, Bachelor, ASPO 01.10.2017
Module code: KIB-RA
Hours per semester week / Teaching method: 4V+1P (5 hours per week)
ECTS credits: 5
Semester: 3
Mandatory course: yes
Language of instruction:

[still undocumented]
Applicability / Curricular relevance:
KIB-RA Computer Science and Communication Systems, Bachelor, ASPO 01.10.2017, semester 3, mandatory course
75 class hours (= 56.25 clock hours) over a 15-week period.
The total student study time is 150 hours (equivalent to 5 ECTS credits).
There are therefore 93.75 hours available for class preparation and follow-up work and exam preparation.
Recommended prerequisites (modules):
Recommended as prerequisite for:
Module coordinator:
Prof. Dr.-Ing. Jürgen Schäfer
Prof. Dr. Albrecht Kunz
Prof. Dr.-Ing. Jürgen Schäfer

[updated 25.01.2018]
Learning outcomes:
After successfully completing this module, students will be able to understand, analyze and design digital circuits (switching networks, switching devices). Important applications, especially from the field of computer technology, will be elaborated on and developed during this practical course.
Students will learn how digital computers are structured, organized and how they operate. The architectural elements of a computer will be discussed at register level and brought together to form a sample architecture. By understanding command processing, addressing techniques and concepts such as pipeline and cache, students will be able to understand modern computer architectures.

[updated 26.02.2018]
Module content:
Part I:
 1. Introduction
 2. Combinational circuits
  2.1 Basics
  2.2 Normal forms
  2.3 Minimization of switching functions
  2.4 Examples
 3. Sequential circuits
  3.1 Flip flops
  3.2 Registers, shift registers
  3.3 Counters
  3.4 Examples
Part II:
 1. Representing numbers in the computer
 2. Von Neumann architecture
 3. Memory components
 4. Sequential control
 5. Microprogramming
 6. Instruction set architecture
 7. Interrupt handling
 8. RISC processors
 9. Pipelining
10. Cache

[updated 26.02.2018]
Recommended or required reading:
Part I:
Borgmeyer: Grundlagen der Digitaltechnik, Hanser-Verlag, 2001
Borucki: Grundlagen der Digitaltechnik, Teubner-Verlag, 2000
Beuth: Digitaltechnik, Vogel Verlag, 2003
Urbanski: Digitaltechnik, Springer Verlag, 2004
Part II:
W. Schiffmann, R. Schmitz: Technische Informatik 2, Springer-Verlag, Berlin, 1999
K. Wüst, Mikroprozessortechnik, Vieweg-Verlag, Braunschweig, 2003
H. Malz, Rechnerarchitektur, Vieweg-Verlag, Braunschweig, 2004
J. L. Hennessy, D. A. Patterson: Rechnerarchitektur Analyse, Entwurf, Implementierung und Bewertung, Vieweg-Verlag, Braunschweig, 2004
P. Herrmann : Rechnerarchitektur _ Aufbau Organisation und Implementierung, Vieweg-Verlag, Braunschweig, 2000

[updated 26.02.2018]
Module offered in:
WS 2021/22, WS 2020/21, WS 2019/20, WS 2018/19
[Sun Jan 23 03:55:55 CET 2022, CKEY=krb, BKEY=ki2, CID=KIB-RA, LANGUAGE=en, DATE=23.01.2022]